The present invention relates, in general, to a high performance signal processor, and more particularly to a signal processor for efficiently computing digital signal processing algorithms based on the Fast Fourier Transform.
The Fast Fourier Transform (FFT) is one of the most frequently used algorithms in digital signal processing. It finds applications in digital audio systems, radar and sonar signal processing, seismic systems, and speech processing. These applications require numerical precision ranging from 8 bits to 20 bits and, in some cases require a floating point number representation. The sampling rates for such processing vary from Hertz to mega-Hertz. These broad and varied requirements have been difficult to meet, and accordingly, prior devices for carrying out the FFT have been large arrays, using multiple integrated circuit chips on a printed circuit board. Such large arrays have operated under the control of a host computer, burdening the computer and limiting the speed at which such devices could operate. Since in many applications, such as radar signal processing, speed is the primary objective of a processor, prior processor systems and devices have been unduly limiting.
In addition to the limits on device speeds, many prior devices have encountered difficulties in producing a high degree of numerical accuracy, caused in part by the need to round off the intermediate processing results during the processing operations. Such rounding, or truncation, of intermediate results occurs after the parallel multipliers and/or adders used in prior systems, where the least significant bits are eliminated, thereby limiting the accuracy of the results. A further problem with such prior devices is that they require a large amount of space (multiple chip sets) to accommodate the arrays, which results in relatively high power consumption. Finally, prior implementations require complicated and sophisticated programming to enable those systems to work, whereas the present invention has a simple three-line handshake protocol with a host computer.